Thomas4711
08.05.2012, 14:30
Overclock zeigt nur error in der Uhr-
Cat /proc/cpu_frequ/pll0*
Thomas4711
08.05.2012, 14:47
fortis:~# cat /proc/cpu_frequ/pll0*
Modul HZ = 250
CKGA_LCK = 0
CKGA_MD_STA = 3
CKGA_PLL0_CFG = 83b06
CKGA_PLL0_LCK_STA = 1
CKGA_PLL0_CLK1 = 0
CKGA_PLL0_CLK2 = 1
CKGA_PLL0_CLK3 = 0
CKGA_PLL0_CLK4 = 0
CKGA_PLL1_CFG = 94a05
CKGA_PLL1_LCK_STA = 1
CKGA_CLK_DIV = 0
CKGA_CLK_EN = 3f
CKGA_PLL1_BYPASS = 0
CKGA_CLKOUT_SEL = 0
SYSACLKOUT (standard 266MHZ) = 265MHZ
TMU0_TCOR = 10347
TMU0_TCNT = 58d
TMU1_TCOR = ffffffff
TMU1_TCNT = c24e3955
BOGOMIPS (static)= 262
BOGOMIPS (measured)= 214
PLL0 = 531 MHZ
SH4 = 265 MHZ
SH4_IC = 132 MHZ
MODULE = 66 MHZ
SLIM = 265 MHZ
PLL1 = 399 MHZ
COMMS = 99 MHZ
TMU0 = 16 MHZ
TMU1 = 16 MHZ
sh4 ratio (2,4,6,8,12,16)
sh4_ic ratio (2,4,6,8,12,16)
module ratio (4,8,12,16)
slim ratio (2,4,6,8,12,16)
Thomas4711
08.05.2012, 15:18
Sehr häufig nach umschalten kein Ton, das hab ich mit AAF-PLI Image schon lange nicht mehr gehabt.
hast du overclock da schon angehabt?
wusste nich das die SH4 = 265 MHZ anzigen dacht da kommt 266 deswegen sagt der error
Thomas4711
08.05.2012, 17:51
Nein Image frisch installiert mit Maxiboot Installer.
dann geh mal bitte alle durch mit test und mach dann immer den cat befehl und kopier mal alle hier rein
och hoffe du machst jetzt nich für jeden wert ein post^^
Thomas4711
08.05.2012, 18:45
fortis:~# cat /proc/cpu_frequ/pll0*
Modul HZ = 250
CKGA_LCK = 0
CKGA_MD_STA = 3
CKGA_PLL0_CFG = 86409
CKGA_PLL0_LCK_STA = 1
CKGA_PLL0_CLK1 = 0
CKGA_PLL0_CLK2 = 1
CKGA_PLL0_CLK3 = 0
CKGA_PLL0_CLK4 = 0
CKGA_PLL1_CFG = 94a05
CKGA_PLL1_LCK_STA = 1
CKGA_CLK_DIV = 0
CKGA_CLK_EN = 3f
CKGA_PLL1_BYPASS = 0
CKGA_CLKOUT_SEL = 0
SYSACLKOUT (standard 266MHZ) = 300MHZ
TMU0_TCOR = 124f8
TMU0_TCNT = 9c47
TMU1_TCOR = ffffffff
TMU1_TCNT = fb75e22f
BOGOMIPS (static)= 297
BOGOMIPS (measured)= 294
PLL0 = 600 MHZ
SH4 = 300 MHZ
SH4_IC = 150 MHZ
MODULE = 75 MHZ
SLIM = 300 MHZ
PLL1 = 399 MHZ
COMMS = 99 MHZ
TMU0 = 18 MHZ
TMU1 = 18 MHZ
sh4 ratio (2,4,6,8,12,16)
sh4_ic ratio (2,4,6,8,12,16)
module ratio (4,8,12,16)
slim ratio (2,4,6,8,12,16)
fortis:~# cat /proc/cpu_frequ/pll0*
Modul HZ = 250
CKGA_LCK = 0
CKGA_MD_STA = 3
CKGA_PLL0_CFG = 82503
CKGA_PLL0_LCK_STA = 1
CKGA_PLL0_CLK1 = 0
CKGA_PLL0_CLK2 = 1
CKGA_PLL0_CLK3 = 0
CKGA_PLL0_CLK4 = 0
CKGA_PLL1_CFG = 94a05
CKGA_PLL1_LCK_STA = 1
CKGA_CLK_DIV = 0
CKGA_CLK_EN = 3f
CKGA_PLL1_BYPASS = 0
CKGA_CLKOUT_SEL = 0
SYSACLKOUT (standard 266MHZ) = 333MHZ
TMU0_TCOR = 14532
TMU0_TCNT = 107b1
TMU1_TCOR = ffffffff
TMU1_TCNT = eb1d0933
BOGOMIPS (static)= 330
BOGOMIPS (measured)= 321
PLL0 = 666 MHZ
SH4 = 333 MHZ
SH4_IC = 166 MHZ
MODULE = 83 MHZ
SLIM = 333 MHZ
PLL1 = 399 MHZ
COMMS = 99 MHZ
TMU0 = 20 MHZ
TMU1 = 20 MHZ
sh4 ratio (2,4,6,8,12,16)
sh4_ic ratio (2,4,6,8,12,16)
module ratio (4,8,12,16)
slim ratio (2,4,6,8,12,16)
fortis:~# cat /proc/cpu_frequ/pll0*
Modul HZ = 250
CKGA_LCK = 0
CKGA_MD_STA = 3
CKGA_PLL0_CFG = 87a09
CKGA_PLL0_LCK_STA = 1
CKGA_PLL0_CLK1 = 0
CKGA_PLL0_CLK2 = 1
CKGA_PLL0_CLK3 = 0
CKGA_PLL0_CLK4 = 0
CKGA_PLL1_CFG = 94a05
CKGA_PLL1_LCK_STA = 1
CKGA_CLK_DIV = 0
CKGA_CLK_EN = 3f
CKGA_PLL1_BYPASS = 0
CKGA_CLKOUT_SEL = 0
SYSACLKOUT (standard 266MHZ) = 366MHZ
TMU0_TCOR = 1656c
TMU0_TCNT = bda
TMU1_TCOR = ffffffff
TMU1_TCNT = fd88f9ce
BOGOMIPS (static)= 363
BOGOMIPS (measured)= 343
PLL0 = 732 MHZ
SH4 = 366 MHZ
SH4_IC = 183 MHZ
MODULE = 91 MHZ
SLIM = 366 MHZ
PLL1 = 399 MHZ
COMMS = 99 MHZ
TMU0 = 22 MHZ
TMU1 = 22 MHZ
sh4 ratio (2,4,6,8,12,16)
sh4_ic ratio (2,4,6,8,12,16)
module ratio (4,8,12,16)
slim ratio (2,4,6,8,12,16)
fortis:~# cat /proc/cpu_frequ/pll0*
Modul HZ = 250
CKGA_LCK = 0
CKGA_MD_STA = 3
CKGA_PLL0_CFG = 85906
CKGA_PLL0_LCK_STA = 1
CKGA_PLL0_CLK1 = 0
CKGA_PLL0_CLK2 = 1
CKGA_PLL0_CLK3 = 0
CKGA_PLL0_CLK4 = 0
CKGA_PLL1_CFG = 94a05
CKGA_PLL1_LCK_STA = 1
CKGA_CLK_DIV = 0
CKGA_CLK_EN = 3f
CKGA_PLL1_BYPASS = 0
CKGA_CLKOUT_SEL = 0
SYSACLKOUT (standard 266MHZ) = 400MHZ
TMU0_TCOR = 1871d
TMU0_TCNT = 2fbd
TMU1_TCOR = ffffffff
TMU1_TCNT = e05ed925
BOGOMIPS (static)= 397
BOGOMIPS (measured)= 394
PLL0 = 801 MHZ
SH4 = 400 MHZ
SH4_IC = 200 MHZ
MODULE = 100 MHZ
SLIM = 400 MHZ
PLL1 = 399 MHZ
COMMS = 99 MHZ
TMU0 = 25 MHZ
TMU1 = 25 MHZ
sh4 ratio (2,4,6,8,12,16)
sh4_ic ratio (2,4,6,8,12,16)
module ratio (4,8,12,16)
slim ratio (2,4,6,8,12,16)
ne
"add 265 mhz to overclock control"
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