of course this issue is not depending on chip type.
its just the software which doesnt set the corresponding ETHclk-division register to a proper value.
in the effect the ETHclk runs either too slow or too fast which results in lost ETH synchronization.
with correct values for ETH- and USBclk OC up to ~800MHz is possible for Sti7111 and running stable (if 800 can be reached of course depends on hardwarestability at all and on production variations of the CPU )
My network on my Amiko A2 Box keeps restarting it was fine on the last image this only started when i flashed new image?