Code:
fortis:~# cat /proc/cpu_frequ/pll0*
Modul HZ = 250
CKGA_LCK = 0
CKGA_MD_STA = 3
CKGA_PLL0_CFG = 83b06
CKGA_PLL0_LCK_STA = 1
CKGA_PLL0_CLK1 = 0
CKGA_PLL0_CLK2 = 1
CKGA_PLL0_CLK3 = 0
CKGA_PLL0_CLK4 = 0
CKGA_PLL1_CFG = 94a05
CKGA_PLL1_LCK_STA = 1
CKGA_CLK_DIV = 0
CKGA_CLK_EN = 3f
CKGA_PLL1_BYPASS = 0
CKGA_CLKOUT_SEL = 0
SYSACLKOUT (standard 266MHZ) = 265MHZ
TMU0_TCOR = 10347
TMU0_TCNT = 58d
TMU1_TCOR = ffffffff
TMU1_TCNT = c24e3955

BOGOMIPS (static)= 262
BOGOMIPS (measured)= 214

PLL0     = 531 MHZ
SH4      = 265 MHZ
SH4_IC   = 132 MHZ
MODULE   = 66 MHZ
SLIM     = 265 MHZ
PLL1     = 399 MHZ
COMMS    = 99 MHZ
TMU0     = 16 MHZ
TMU1     = 16 MHZ

sh4 ratio (2,4,6,8,12,16)
sh4_ic ratio (2,4,6,8,12,16)
module ratio (4,8,12,16)
slim ratio (2,4,6,8,12,16)